Semiconductor Engineering

Dynamic Fault Injection For System-Level Simulation Of MEMS

In this paper a method for dynamic fault injection and fault simulation as well as its application to MEMS based sensor systems is described. The prerequisite for this approach is the availability of ...
EDN

Pickering adds hardware-in-the-loop fault-simulation modules

Pickering Interfaces is expanding its range of PXI switching products designed for hardware-in-the-loop fault-simulation (also called fault-insertion) applications with the introduction of three new ...
EDN

Improving fault coverage for random-pattern-resistant designs

Designs with LogicBIST exhibit random pattern resistance because of the random nature of LBIST vectors, thus leading to low fault coverage. To handle this, we insert test points with the help of ...
Semiconductor Engineering

Automation And Fault Simulation Of Safety-Critical FPGA Designs

Functional safety is a major challenge for field programmable gate arrays (FPGAs) and other semiconductor designs. Safety requirements go beyond traditional verification, which focuses on design bugs.
Electronic Design

Understanding Cell-Aware ATPG And User-Defined Fault Models

ATPG targets faults at IC-gate boundaries, but 50% of defects are located within cells. Learn how cell-aware ATPG and user-defined fault models help to ferret out these hard-to-squash bugs.
Design-Reuse

Preservation of Circuit Structure and Timing during Fault Emulation in FPGA

This paper presents a technique that allows to preserve structure of a circuit according to a target technology during fault emulation in FPGA. The technique is not restricted to any target technology ...